blizz Posted August 18, 2006 Share Posted August 18, 2006 This is what I basically use for my C++ stuff on linux. I'm using this one for some SDL, GL, boost gadgetry, so just replace it with the includes paths/libraries you need in your build. Why am I writing my own Makefile? I hate GNU auto*! It messes things up. But maybe I'll have to write my own GNU-like configure script later, anyway. I will add debugging build capabilities and a switch for binary/library building later, also I want to include windows support and add support for other languages (C at least. Of course, you just gotta replace the g++ in the CXX variable, but i want to do it more elegant with traditional CC and CCFLAGS). I will also add an EXTENSION variable then for the file endings. Place it in the root directory of your sources and it will compile any of your .cpp files to objects and link them together to one big binary. It will of course detect changes to all your source (.cpp) and header files (.hpp, but works with any of them, just include them somewhere). If you want to build a shared library you should just leave out any main function, add -fPIC -shared to the LDFLAGS and call your target libsomething.so. Also adjust the architecture flag -march to fit yours ;-) If you do not want to compile all the objects in the root directory, just add a second parameter to the collect call, this will only collect cpp files recursively from that directory. Oh and tribute goes to Volkard Henkel who wrote the kinda sick collect macro ;-) CXX = g++ CXXFLAGS = -g -W -Wall -Werror -pipe -O2 -march=athlon64 INCLUDE_PATH = -I/usr/include/GL -I/usr/include/SDL LIBRARIES = GL GLU SDL boost_signals LIBRARY_PATH = -L/usr/X11R6/lib LDFLAGS = $(LIBRARY_PATH) $(addprefix -l,$(LIBRARIES)) SOURCES = $(call collect,%.cpp) OBJECTS = $(patsubst %.cpp,%.o,$(SOURCES)) DEPS = $(patsubst %.cpp,%.dep,$(SOURCES)) collect = $(foreach n,$(wildcard $(2)*),$(filter $(1),$(n)) $(call collect,$(1),$(n)/)) TARGET = happycat all: $(TARGET) $(TARGET): $(OBJECTS) $(DEPS) $(CXX) $(LDFLAGS) -o $@ $(OBJECTS) -include $(DEPS) %.o: %.cpp $(CXX) $(CXXFLAGS) $(INCLUDE_PATH) -o $@ -c $< %.dep: %.cpp $(CXX) $(CXXFLAGS) -MM $< -MT $(<:.cpp=.o) > $@ clean: rm -rf $(OBJECTS) $(DEPS) $(TARGET) .PHONY: all clean I wonder if anyone is also interested in how Makefiles work? It's basically a very old but cool system to create incremental builds. FYI, incremental means that the whole thing doesn't have to compile everything again and again, it will just compile the parts that changed and link them back together. Quote Link to comment Share on other sites More sharing options...
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